Various diagram

ne555 datasheet

Description

These devices are monolithic timing circuits capable of producing accurate time delays or oscillation.
In the time delaymode of operation, the timed interval is controlled by a single external resistor and capacit
or network. In the astable mode of operation, the frequency andduty cy clemay beindependently
controlled with two external resistors and asingle external capacitor.
 
 
Features
                                                                                                              Pin Configuration
 
Timing from Micro seconds to Hours                
 
Astable or Monostable Operation  
Adjustable Duty Cycle
 
TTL - Compatible Output Can Sink or Source Up to200mA  
Temperature Stability of0.005%per oC  
Direct Replacement for Signetics NE555Timer
 
 
                                                                                               Internal Block Digram

  Applications
                                                                        
. Precision timing
. Pulse generation
. Sequential timing
. Timedelay generation
. Pulse width modulation
. Pulse position modulation
. Missing pulse detector
 
 
 
 
 download ne555 datasheet pdf file